The present invention relates to improved defect control of silicon dioxide chemical-mechanical polishing (CMP) through chemistry modifications of a cerium oxide (ceria) slurry solution, and the use of this slurry for improved defect control. In particular, the present invention is concerned with an aqueous-based ceria slurry composition modified by the addition of a cationic surfactant to the slurry solution, and the use of the slurry for improved defect control on semiconductor wafers, specifically wafers that have been lithographically patterned at the shallow trench isolation (STI) level.
In fabricating integrated circuits on semiconductor wafers, it is necessary for the semiconductor wafer to have a smooth, surface and a high degree of flatness. For this purpose, silicon is used as the semiconductor material and the wafers are obtained by slicing ingots of silicon. However, as silicon is a hard and brittle material, it is difficult to avoid small variations in the thickness of the wafers on slicing the ingot. Similarly, it is difficult to avoid microscopic surface scratches and other surface defects on the wafer, or to obtain a uniformly flat surface on the wafer on slicing the ingot. Since these defects, if not rectified, affect the quality and yield of integrated circuits, it is necessary to process the wafers to reduce the defects.
A standard method for reducing the defects is to polish the wafer using a slurry. Usually, in this polishing step, the wafer is pressed against a rotating pad while a slurry is added in between the pad and wafer. Thus, as the pad is rotated, the wafer is polished and flattened, and surface defects are reduced by a combination of a chemical-mechanical action, the chemical action due to the slurry solution, and the abrasive action due to the particles in the slurry. In using the slurry to polish the wafers, it is believed that the frictional heat and the chemical action promote the oxidation of a thin surface layer of the wafer. Simultaneously, as the pad is rotated against the wafer, the abrasive particles in the slurry abrade the oxidized layer to leave behind a relatively smooth, flat surface.
In addition to polishing the wafer prior to lithographic patterning, for some wafers, it is also necessary to polish the wafer after lithographic patterning, specifically at the shallow trench isolation level wherein shallow trenches are etched into the silicon and filled with silicon dioxide for device isolation. In this instance, a chemical-mechanical polishing (CMP) operation is required to planarize the silicon dioxide so that further circuit elements can be defined.
In the prior art, slurries containing abrasive particles suitable for use in CMP of semiconductors are known and have been used with varying degrees of success. FIG. 1 is an image from a Scanning Electron Microscope after a CMP operation showing a scratch on a surface. Typically, with prior art slurries, the abrasive component is one or more abrasive particles of silica in its various forms, alumina, titania and ceria. For example, U.S. Pat. No. 5,264,010, discloses a slurry composition comprising a mixture of fused silica, precipitated silica and ceria. Similarly, U.S. Pat. No. 5,876,490 discloses a slurry composition comprising abrasive particles and a polyelectrolyte wherein the charge on the polyelectrolyte is different from the charge on the abrasive particles.
Notwithstanding the availability of prior art CMP slurries, a persistent problem with the wafers is an unacceptably high surface defect density. These defects include particle contamination remaining on the surface after CMP (e.g. slurry particles stuck to the wafer, and other particles); scratches introduced onto the wafer surface by large particles, or by inappropriate contact with the polishing pad, or by particle contamination present on the wafer before CMP; or prior-level defects on the wafer that may grow due to the planarizing nature of the CMP operation. Accordingly, it desirable to have CMP slurry composition for polishing semiconductor wafers to reduce or eliminate an unacceptably high surface defect density.
In accordance with the objective of the present invention, there is provided an aqueous-based ceria slurry composition comprising a cationic surfactant in a neutral to alkaline pH solution. Also provided in accordance with the present invention is a method for polishing semiconductor wafers wherein the slurry of the invention is utilized to reduce surface defect density. The slurry of the invention preferably includes less than about 5 wt % of abrasive cerium oxide particles and up to about the critical micelle concentration of a cationic surfactant, absent other abrasives, in a neutral to alkaline pH aqueous solution. With the present slurry, surprisingly, the defect density is reduced compared to the defect density obtained with prior art slurries in CMP operations.
Without being bound by any particular theory, it is believed that the surfactant(s) in the present slurry chemisorb onto the surface of the wafer to protect the surface from polishing scratches and contamination. Thus, by providing the present slurry, the invention provides for improved yields in fabricating semiconductor devices.